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1. general description the pca2002 is a cmos integrated circuit for battery operated wrist watches with a 32 khz quartz crystal as the timing elemen t and a bipolar stepping motor. the quartz crystal oscillator an d the frequency divider are opt imized for minimum current consumption. a timing accuracy of 1 ppm is achieved with a programmable, digital frequency adjustment. the output period and the output pulse wid th can be programmed. it can be selected between a full output pulse or a chopped output pulse with a duty cycle of 75 %. in addition, a stretching pulse can be added to the primary driving pulse. a pad reset is provided (used for stopping t he motor) for accurate time setting and for accelerated testing of the watch. 2. features and benefits ? amplitude-regulated 32 khz qua rtz crystal oscillator, with excellent frequency stability and high immunity to leakage currents ? electrically programmable time calibration with 1 ppm resolution stored in one time programmable (otp) memory ? the quartz crystal is the only external component required ? very low current consumption: typically 90 na ? output pulses for bipolar stepping motors ? five different programmable output periods (1 s to 30 s) ? output pulse width programmable between 1 ms and 8 ms ? full or chopped motor pulse and pulse stretching, selectable ? stop function for accurate time setting and current saving during shelf life ? test mode for accelerated testing of the mechanical parts of the watch ? test bits for type recognition 3. applications ? driver circuits for bipolar stepping motors ? high immunity motor drive circuits ? high production volumes pca2002 32 khz watch circuit with programmable output period and pulse width rev. 06 ? 6 may 2010 product data sheet
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 2 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width 4. ordering information 5. block diagram table 1. ordering information type number package name description delivery form version pca2002u/ab/1 pca200xu wire bond die; 8 bonding pads; 1.16 0.86 0.22 mm bare die; chip in tray pca200xu pca2002u/10ab/1 pca200xu wire bond die; 8 bonding pads; 1.16 0.86 0.22 mm bare die; chip on film frame carrier pca200xu pca2002cx8/5/1 pca200xcx wafer level chip-size package; 8 bumps; 1.16 0.86 0.31 mm unsawn wafer with lead free solder bumps pca200xcx fig 1. block diagram mbl568 4 mot1 mot2 reset i.c. n.c. n.c. v dd v ss voltage detector, otp-controller motor control pca2002 divider reset reset 32 hz 1 hz 8 khz oscillator oscin oscout otp-memory timing adjustment, inhibition m
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 3 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width 6. pinning information 6.1 pinning 6.2 pin description top view. for mechanical details, see figure 10 . top view. for mechanical details, see figure 11 fig 2. pad and bump configuration of pca2002 001aai177 pca200xu 1 v ss 8 reset 2 i.c. 7 mot2 3 oscin 6 mot1 4 oscout 5 v dd x y 0 0 001aai176 pca200xcx 1 v ss 8 reset 2 i.c. 7 mot2 3 oscin 6 mot1 4 oscout 5 v dd x y 0 0 table 2. pin description for pca2002 symbol pin description v ss 1 ground i.c. 2 internally connected oscin 3 oscillator input oscout 4 oscillator output v dd 5 supply voltage mot1 6 motor 1 output mot2 7 motor 2 output reset 8 reset input
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 4 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width 7. functional description 7.1 motor pulse the motor driver delivers pulses with an altern ating polarity. the output waveform across the motor terminals is illustrated in figure 3 . between the motor puls es, both terminals are connected to v dd which means that the motor is short-circuit. the following parameters can be selected and are stored in a one time programmable (otp) memory: ? output periods of 1 s, 5 s, 10 s, 20 s and 30 s ? pulse width (t p ) between 0.98 ms and 7.8 ms in steps of 0.98 ms ? full or chopped (75 %) output pulse ? pulse stretching: an enlargement pulse is added to the primary motor pulse. this enlargement pulse has a duty cycle of 25 % and a width which is twice the programmed motor pulse width. 7.2 time calibration the quartz crystal oscillator ha s an integrated capa citance of 5.2 pf, which is lower than the specified capacitance (c l ) of 8.2 pf for the quartz crystal (see ta b l e 9 ). therefore, the oscillator frequency is typica lly 60 ppm higher th an 32.768 khz. this positive frequency offset is compensated by re moving the appropriate number of 8192 hz pulses in the divider chain (maximum 127 pulses), every 1 or 2 minutes. the time correction is given in ta b l e 3 . fig 3. motor output waveforms full pulse mgu71 8 chopped pulse full pulse with stretching chopped pulse with stretching period t p 2t p t p 2t p
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 5 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width after measuring the effective oscillator frequency, the number of correction pulses must be calculated and stored together with the calibration period in the otp memory (see section 7.6 ). the oscillator frequency can be measured at pad reset, wher e a square wave signal with the frequency of is provided. this frequency shows a jitter every minute or every two minutes, depending on the programmed calibration period, which originates from the time calibration. details on how to measure the oscillator fr equency and the programmed inhibition time are given in section 7.10 . 7.3 reset at pin reset an output signal with a frequency of is provided. connecting pin reset to vdd stops the mo tor drive and opens the motor switches. after releasing pin reset, the first motor pulse is generated exactly one period later with the opposite polarity to the last pulse befo re stopping. the debounce time for the reset function is between 31 ms and 62 ms. connecting pin reset to v ss activates the test mode. in this mode the motor output frequency is 32 hz, which can be used to te st the mechanical function of the watch. 7.4 programming possibilities the programming data is organized in an array of 8-bit words (see ta b l e 4 ). a contains the time calibration, b the setti ng for the monitor pulses, c is not used and d contains the type recognition (see ta b l e 7 ). table 3. time calibration calibration period correction per step (n = 1) correction per step (n = 127) ppm seconds per day ppm seconds per day 1 minute 2.03 0.176 258 22.3 2 minutes 1.017 0.088 129 11.15 1 1024 ------------ - f osc 1 1024 ------------ - f osc 32hz = table 4. words and bits word bit 1 2 3 4 5 6 7 8 a number of 8192 hz pulses to be removed calibration period b pulse width output period duty cycle pulse stretching c d type factory test bit
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 6 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width 7.5 type recognition byte d is read to determine which type of the pca200x family is used in a particular application. table 5. description of word a bits bit value description inhibit time 1 to 7 - adjust the number of the 8 192 hz pulses to be removed; bit 1 is the msb and bit 7 is the lsb calibration period 801minute 12minutes table 6. description of word b bits bit value description pulse width t p (ms) 1 to 3 000 0.98 001 1.95 010 2.9 011 3.9 100 4.9 101 5.9 110 6.8 111 7.8 output period (s) 4to6 000 1 001 5 010 10 011 20 100 30 duty cycle of motor pulse 7075 % 1100 % pulse stretching 8 0 no pulse stretching 1 a pulse width of 2 t p and a duty factor of 25 % are added table 7. description of word d bits bit value description type recognition 1 to 4 0000 pca2002 1000 pca2000 0100 pca2001 1100 pca2003
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 7 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width 7.6 programming procedure to ensure that the oscillator starts up corre ctly you must execute a reset sequence (see figure 4 ). for a watch it is essential that the timing calib ration can be made after the watch is fully assembled. in this si tuation, the supply pins are ofte n the only terminals which are still accessible. writing to the otp cells and pe rforming the related functional checks is achieved in the pca2002 by modulating the supply voltage. the necessary control circuit consists basically of a voltage level de tector, an instruction counter which determines the function to be performed, and an 8-bit shift register which allows writing the otp cells of an 8-bit word in one step and which acts as data pointer for checking the otp content. ? state 1; measurement of the crystal o scillator frequency (d ivided by 1024) ? state 2; measurement of the inhibition time ? state 3; write/check word a ? state 4; write/check word b ? state 5; check word c (don?t care since no meaning) ? state 6; check word d (type recognition) each instruction state is switched on with a pulse to v p(prog)(start) . after this large pulse, an initial waiting time of t 0 is required. the programming instructions are then entered by modulating the supply voltage with small pulses (amplitude v p(mod) and pulse width t mod ). the first small pulse defines the start time, the following pulses perform three different functions, depending on the time delay (t d ) from the preceding pulse (see figure 5 , figure 6 , figure 7 , figure 8 and figure 9 ): ? t d =t 1 (0.7 ms); increments the instruction counter ? t d =t 2 (1.7 ms); clocks the shift register with data = logic 0 ? t d =t 3 (2.7 ms); clocks the shift register with data = logic 1 the programming procedure requires a stab le oscillator, which mean s that a waiting time, determined by the start-up time of the oscillator, is necessar y after power-up of the circuit. t d(start) : start delay time. v dd(nom) : nominal supply voltage. fig 4. supply voltage at start-up during production and testing v dd v p(prog)(stop) t d(start) > 500 ms v ss v dd(nom) 001aac5 03 t p(stop)
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 8 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width after the v p(prog)(start) pulse, the instruction counter is in state 1 and the data shift register is cleared. the instruction state ends with a second pulse to v p(prog)(stop) or with the pulse to v store . in any case, the instruction st ates are terminated automatically 2 seconds after the last supply modulation pulse. 7.7 programming the memory cells applying the two-stage programming pulse (see figure 5 ) transfers the stored data in the shift register to the otp cells. perform the following to program a memory word: 1. starting with a v p(prog)(start) pulse, wait for the time period t 0 then set the instruction counter to the word to be written (t d =t 1 ). 2. enter the data to be stored into the shift register (t d =t 2 or t 3 ), lsb first (bit 8) and msb last (bit 1). 3. applying the two-stage programming pulse v prestore followed by v store stores the word. the delay between the last data bit and the pre-store pulse v prestore is t d =t 4 . store the word by raising the supply voltage to v store ; the delay between the last data bit and the store pulse is t d . the example shown in figure 5 performs the following functions: ? start ? setting the instruction counter to state 4 (word b) ? entering data word 110101 into the shift register (seq uence: lsb first and msb last) ? writing the otp cells for word b the example shows the programming of b = 1 10101 (the sequence is msb first and lsb last). v dd(nom) : nominal supply voltage. fig 5. supply voltage modulation for programming mgw356 v dd(nom) v p(mod) v dd v ss v p(prog)(start) t p(start) t 0 t 1 t 1 t 1 t 3 t 2 t 3 t 2 t 3 t 3 t 4 t w(store) v store v prestore t w(prestore)
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 9 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width 7.8 checking the memory content the stored data of the otp array can be checked bit wise by measuring the supply current (see figure 6 ). the array word is selected by the instruction state and the bit is addressed by the shift register. to read a word, the word is first selected (t d =t 1 ) and a logic 1 is written into the first cell of the shift register (t d =t 3 ). this logic 1 is then shifted through the entire shift register (t d =t 2 ), so that it points with each clock pulse to the next bit. if the addressed otp cell contains a logic 1, a 30 k resistor is connected between v dd and v ss ; this increases the supply current accordingly. figure 6 shows the supply voltage modulation for reading word b, with the corresponding supply current variation for word b = 110101 (sequence: first msb and last lsb). v dd(nom) : nominal supply voltage. (1) fig 6. supply voltage modulation for reading word b v dd(nom) v dd v p(mod) (1) v ss t 0 mgw357 i dd t 1 t 1 t 3 t 2 t 1 t 2 t 2 t 2 t 2 v p(prog)(start) t p(start) v p(prog)(stop) t p(stop) i dd v dd 30 k ---------------- - =
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 10 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width 7.9 frequency tuning at assembled watch figure 7 shows the test set-up for freq uency tuning the assembled watch. 7.10 measurement of the oscillator frequency and th e inhibition time the output of the two measurin g states can either be monitore d directly at pin reset or as a modulation of the supply current (a modulating resistor of 30 k is connected between v dd and v ss when the signal at pin reset is at high-level). the supply voltage modulation must be followed as shown in figure 4 in order to guarantee the correct start-up of the circuit during production and testing. measuring states: ? state 1; quartz crystal oscillato r frequency divided by 1024; state 1 starts with a pulse to v p and ends with a second pulse to v p ? state 2; inhibition time has a value of n 0.122 ms. a signal with the periodicity of 31.25 ms + n 0.122 ms appears at pin reset and as current modulation at pin v dd (see figure 8 and figure 9 ) fig 7. frequency tuning the assembled watch mgw568 frequency counter programmable dc power supply pc interface pc m motor 32 khz pca200x battery fig 8. output waveform at pin reset for instruction state 2 mgw355 v dd v ss 31.25 ms + inhibition time v o(dif)
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 11 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width v dd(nom) : nominal supply voltage. fig 9. supply voltage modulation for start and stop of instruction state 2 v dd v p(prog)(start) v p(mod) v p(prog)(stop) t 1 t p(start) t 0 v ss v dd(nom) mgu71 9 t p(stop)
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 12 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width 8. limiting values [1] when writing to the otp cells, the supply voltage (v dd ) can be raised to a maximum of 12 v for a time period of 1 s. [2] connecting the battery with reversed polarity does not destroy the circuit, but in this condition a large current flows which rapidly discharges the battery. [3] pass level; human body model (hbm), according to ref. 4 ? jesd22-a114 ? . [4] pass level; machine model (mm), according to ref. 5 ? jesd22-a115 ? . [5] pass level; latch-up testing according to ref. 6 ? jesd78 ? at maximum ambient temperature (t amb(max) ). [6] according to the nxp store and transport requirements (see ref. 8 ? nx3-00092 ? ) the devices have to be stored at a temperature of +8 c to +45 c and a humidity of 25 % to 75 %. for long term storage products deviant conditions are described in that document. table 8. limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v dd supply voltage v ss =0v [1] [2] ? 1.8 +7.0 v v i input voltage ? 0.5 +7.5 v t sc short circuit duration time output - indefinite s v esd electrostatic discharge voltage hbm [3] - 2000 v mm [4] - 200 v i lu latch-up current [5] -100ma t stg storage temperature [6] ? 30 +100 c t amb ambient temperature ? 10 +60 c
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 13 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width 9. characteristics [1] r l and c l are a load resistor and load capacitor, externally connected to pad reset. table 9. characteristics v dd = 1.55 v; v ss =0v; f osc = 32.768 khz; t amb =25 c; quartz crystal: r s =40k , c 1 = 2 ff to 3 ff, c l = 8.2 pf; unless otherwise specified. symbol parameter conditions min typ max unit supplies v dd supply voltage normal operating mode; t amb = ? 10 c to +60 c 1.1 1.55 3.6 v v dd supply voltage variation v/ t=1v/ s--0.25v i dd supply current between motor pulses - 90 120 na between motor pulses at v dd =3.5v - 120 180 na t amb = ? 10 c to +60 c - - 200 na stop mode; pin reset connected to v dd - 100 135 na motor output v sat saturation voltage r motor =2k ; t amb = ? 10 c to +60 c - 150 200 mv z o(sc) output impedance (short circuit) between motor pulses; i motor <1ma - 200 300 oscillator v start start voltage 1.1 - - v g m transconductance v i(osc) 50 mv(p-p) 5 10 - s t startup start-up time - 0.3 0.9 s f/f frequency stability v dd =100mv - 0.05 0.2 ppm c l(itg) integrated load capacitance 4.3 5.2 6.3 pf r par parasitic resistance allowed resistance between adjacent pins 20 - - m pad reset f o output frequency - 32 - hz v o(dif) differential output voltage r l =1m ; c l =10pf [1] 1.4 - - v t r rise time r l =1m ; c l =10pf [1] -1- s t f fall time r l =1m ; c l =10pf [1] -1- s i i(av) average input current pin reset connected to v dd or v ss - 1020na
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 14 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width 10. otp programming characteristics [1] program each word once only. table 10. specifications for otp programming symbol parameter [1] conditions min typ max unit v dd supply voltage during programming procedure 1.5 - 3.0 v v p(prog)(start) programming supply voltage (start) 6.6 - 6.8 v v p(prog)(stop) programming supply voltage (stop) 6.2 - 6.4 v v p(mod) supply voltage modulation for entering instructions, referred to v dd 320 350 380 mv v prestore prestore voltage for prestore pulse 6.2 - 6.4 v v store supply voltage for writing to the otp cells 9.9 10.0 10.1 v i store store current for writing to the otp cells - - 10 ma t p(start) start pulse width 8 10 12 ms t p(stop) pulse width of stop pulse 0.05 - 0.5 ms t mod modulation pulse width 25 30 40 s t w(prestore) prestore pulse width 0.05 - 0.5 ms t w(store) store pulse width for writing to the otp cells 95 100 110 ms t 0 time 0 waiting time after start pulse 20 - 30 ms t 1 time 1 pulse distance for incrementing the state counter 0.6 0.7 0.8 ms t 2 time 2 pulse distance for clocking the data register with data = logic 0 1.6 1.7 1.8 ms t 3 time 3 pulse distance for clocking the data register with data = logic 1 2.6 2.7 2.8 ms t 4 time 4 waiting time for writing to otp cells 0.1 0.2 0.3 ms sr slew rate for modulation of the supply voltage 0.5 - 5.0 v/ s r mod modulation resistance supply current modulation read-out resistor 18 30 45 k
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 15 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width 11. bare die outline fig 10. bare die outline pca200xu references outline version european projection issue date iec jedec jeita pca200xu w ire bond die; 8 bonding pads; 1.16 x 0.86 x 0.22 mm pca200x u unit mm max nom min 0.22 0.20 0.18 1.16 0.17 0.32 0.96 0.099 0.096 0.093 0.099 0.096 0.093 a dimensions (mm are the original dimensions) 0 0.5 1 mm scale d e 0.86 e 1 e 2 e d p 1 p 2 0.089 0.086 0.083 p 3 0.089 0.086 0.083 p 4 a x d e d e 1 e 2 e detail x p 2 p 1 p 4 p 3 08-05-09 08-05-21
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 16 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width [1] all coordinates are referenced, in m, to the center of the die (see figure 10 and figure 11 ). [2] the substrate (rear side of the chip) is connected to v ss . therefore, the die pad must be either floating or connected to v ss . [3] pad i.c. is used for factory test; in normal operatio n it must be left open-circuit, and it has an internal pull-down resistor connected to v ss . fig 11. bare die outline pca200xcx (wlcsp8) references outline version european projection issue date iec jedec jeita pca200xcx w lcsp8: wafer level chip-size package; 8 bumps; 1.16 x 0.86 x 0.31 mm pca200xc x unit mm max nom min 0.310 0.275 0.240 0.090 0.075 0.060 1.16 0.86 0.17 0.32 a dimensions (mm are the original dimensions) a 1 a 2 0.22 0.20 0.18 d 0.12 0.10 0.08 b e e 1 e 2 e d 0.96 0 0.5 1 mm scale x detail x a a 2 a 1 d b e 1 e 2 e e d 08-05-09 08-05-21 table 11. bonding pad and solder bump locations symbol pad coordinates [1] x y v ss [2] 1 ? 480 +330 i.c. [3] 2 ? 480 +160 oscin 3 ? 480 ? 160 oscout 4 ? 480 ? 330 v dd 5+480 ? 330 mot1 6 +480 ? 160 mot2 7 +480 +160 reset 8 +480 +330
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 17 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width 12. packing information 12.1 tray information fig 12. tray details table 12. tray dimensions dimension description value a pocket pitch; x direction 2.15 mm b pocket pitch; y direction 2.43 mm c pocket width; x direction 1.01 mm d pocket width; y direction 1.39 mm e tray width; x direction 50.67 mm f tray width; y direction 50.67 mm g distance from cut corner to pocket (1 and 1) center 4.86 mm h distance from cut corner to pocket (1 and 1) center 4.66 mm j tray thickness 3.94 mm m pocket depth 0.61 mm x number of pockets in x direction 20 y number of pockets in y direction 18 mgu653 d f e x y a g h 1,1 x,1 2,1 1,2 1,3 1,y x,y 2,2 3,1 c b m j a a section a-a
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 18 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width the orientation of the ic in a pocket is indicat ed by the position of the ic type name on the surface of the die, with respect to the cut corner on the upper left of the tray. fig 13. tray alignment mbl573 pca2002
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 19 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width 12.2 unsawn wafer information the die are grouped in arrays of 2 6 devices. each array is edged with a metal path. all this metal paths have to be cut while dicing. fig 14. wafer layout of pca2002cx8 strai g ht ed g e of the wafer x y saw lane ~18 m (1) ~18 m (1) 84 m 84 m ~18 m (1) (1) detail x saw lane 84 m detail y 001aai236 18 45 18 45 18 45 18 45 18 45 18 45 18 45 18 45 18 45 18 45 18 45 18 45
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 20 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width 13. soldering of wlcsp packages 13.1 introduction to soldering wlcsp packages this text provides a very brief insight into a complex technology. a more in-depth account of soldering wlcsp (wafer level chip-size packages) can be found in application note an10439 ?wafer level chip scale package? and in application note an10365 ?surface mount reflow soldering description? . wave soldering is not su itable for this package. all nxp wlcsp packages are lead-free. 13.2 board mounting board mounting of a wlcsp requires several steps: 1. solder paste printing on the pcb 2. component placement with a pick and place machine 3. the reflow soldering itself 13.3 reflow soldering key characteristics in reflow soldering are: ? lead-free versus snpb solderi ng; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see figure 15 ) than a pbsn process, thus reducing the process window ? solder paste printing issues, such as sm earing, release, and adjusting the process window for a mix of large and small components on one board ? reflow temperature profile; this profile includ es preheat, reflow (in which the board is heated to the peak temperature), and coo ling down. it is imper ative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic) while being low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classified in accordance with ta b l e 1 3 . moisture sensitivity precautions, as indicat ed on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during reflow soldering, see figure 15 . table 13. lead-free process (from j-std-020c) package thickness (mm) package reflow temperature ( c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 21 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width for further information on temperature profiles, refer to application note an10365 ?surface mount reflow soldering description? . 13.3.1 stand off the stand off between the substrate and the chip is determined by: ? the amount of printed solder on the substrate ? the size of the solder land on the substrate ? the bump height on the chip the higher the stand off, the better the stresses are released due to tec (thermal expansion coefficient) differences between substrate and chip. 13.3.2 quality of solder joint a flip-chip joint is considered to be a good joint when the entire solder land has been wetted by the solder from the bump. the surface of the joint should be smooth and the shape symmetrical. the soldered joints on a chip should be uniform. voids in the bumps after reflow can occur during the reflow process in bumps with high ratio of bump diameter to bump height, i.e. low bumps with large diameter. no failures have been found to be related to these voids. solder joint inspection after reflow can be done with x-ray to monitor defects such as bridging, open circuits and voids. 13.3.3 rework in general, rework is not recommended. by rework we mean the process of removing the chip from the substrate and replacing it with a new chip. if a chip is removed from the substrate, most solder balls of the chip will be damaged. in that case it is recommended not to re-use the chip again. msl: moisture sensitivity level fig 15. temperature profiles for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 22 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width device removal can be done when the substrate is heated until it is certain that all solder joints are molten. the chip can then be carefully removed from the substrate without damaging the tracks and solder lands on the substrate. removing the device must be done using plastic tweezers, because me tal tweezers can damage the silicon. the surface of the substrate should be carefully cleaned and all solder and flux residues and/or underfill remove d. when a new chip is placed on the substrate, use the flux process instead of solder on the solder lands. apply flux on the bumps at the chip side as well as on the solder pads on the substrate. place and align the new chip while viewing with a microscope. to reflow the solder, use the solder profile shown in application note an10365 ?surface mount reflow soldering description? . 13.3.4 cleaning cleaning can be done after reflow soldering. 14. abbreviations 15. references [1] an10706 ? handling bare die [2] iec 60134 ? rating systems for electronic tu bes and valves and analogous semiconductor devices [3] iec 61340-5 ? protection of electronic devices from electrostatic phenomena [4] jesd22-a114 ? electrostatic discharge (esd) sensitivity testing human body model (hbm) [5] jesd22-a115 ? electrostatic discharge (esd) se nsitivity testing machine model (mm) [6] jesd78 ? ic latch-up test [7] jesd625-a ? requirements for handling elec trostatic-discharge-sensitive (esds) devices [8] nx3-00092 ? nxp store and transport requirements table 14. abbreviations acronym description hbm human body model lsb least significant bit mm machine model msb most significant bit otp one time programmable
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 23 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width 16. revision history table 15. revision history document id release date data sheet status change notice supersedes pca2002_6 20100506 product data sheet - pca2002_5 modifications: ? the format of this data sheet has been redesi gned to comply with the new identity guidelines of nxp semiconductors. ? legal texts have been adapted to the new company name where appropriate. ? added specifying amendments to table 10 pca2002_5 20081111 product data sheet - pca2002_4 pca2002_4 20050907 product data sheet - pca2002_3 pca2002_3 20040120 product specification - pca2002_2 pca2002_2 20030204 objective specification - pca2002_1 pca2002_1 20021025 objective specification - -
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 24 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width 17. legal information 17.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 17.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 17.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interrupt ion, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this docu ment contains the product specification.
pca2002_6 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2010. all rights reserved. product data sheet rev. 06 ? 6 may 2010 25 of 26 nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive s pecifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully in demnifies nxp semi conductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive appl ications beyond nxp semiconductors? standard warranty and nxp semicond uctors? product specifications. bare die ? all die are tested on compliance with their related technical specifications as stated in this data sheet up to the point of wafer sawing and are handled in accordance with the nxp semiconductors storage and transportation conditions. if there are data sheet limits not guaranteed, these will be separately indicated in the data sheet. there are no post-packing tests performed on individual die or wafers. nxp semiconductors has no control of third party procedures in the sawing, handling, packing or assembly of the die. accordingly, nxp semiconductors assumes no liability for device functionality or performance of the die or systems after third party sawing, handling, packing or assembly of the die. it is the responsibility of the customer to test and qualify their application in which the die is used. all die sales are conditioned upon and subject to the customer entering into a written die sale agreement with nxp semiconductors through its legal department. 17.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. i 2 c-bus ? logo is a trademark of nxp b.v. 18. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors pca2002 32 khz watch circuit with programmable output period and pulse width ? nxp b.v. 2010. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 6 may 2010 document identifier: pca2002_6 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 19. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 functional description . . . . . . . . . . . . . . . . . . . 4 7.1 motor pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 time calibration . . . . . . . . . . . . . . . . . . . . . . . . 4 7.3 reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.4 programming possibilities. . . . . . . . . . . . . . . . . 5 7.5 type recognition . . . . . . . . . . . . . . . . . . . . . . . . 6 7.6 programming procedure . . . . . . . . . . . . . . . . . . 7 7.7 programming the memory cells . . . . . . . . . . . . 8 7.8 checking the memory content . . . . . . . . . . . . . 9 7.9 frequency tuning at assembled watch . . . . . . 10 7.10 measurement of the oscillator frequency and the inhibition time. . . . . . . . . . . . . . . . . . . 10 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 12 9 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 13 10 otp programming characteristics . . . . . . . . . 14 11 bare die outline . . . . . . . . . . . . . . . . . . . . . . . . 15 12 packing information . . . . . . . . . . . . . . . . . . . . 17 12.1 tray information . . . . . . . . . . . . . . . . . . . . . . . 17 12.2 unsawn wafer information . . . . . . . . . . . . . . . 19 13 soldering of wlcsp packages. . . . . . . . . . . . 20 13.1 introduction to soldering wlcsp packages . . 20 13.2 board mounting . . . . . . . . . . . . . . . . . . . . . . . 20 13.3 reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 20 13.3.1 stand off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 13.3.2 quality of solder joint . . . . . . . . . . . . . . . . . . . 21 13.3.3 rework . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 13.3.4 cleaning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 14 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 22 15 references . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 16 revision history . . . . . . . . . . . . . . . . . . . . . . . . 23 17 legal information. . . . . . . . . . . . . . . . . . . . . . . 24 17.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 24 17.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 17.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 17.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 25 18 contact information. . . . . . . . . . . . . . . . . . . . . 25 19 contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

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